August 21, 2025
This page lists all available course documents.
Get familiar with using a virtual machine, hypervisor and paravirtualization technology.
An architectural overview of computer memory, covering the volatility and functional differences between RAM, ROM, and specialized VRAM, the CPU cache hierarchy, and the role of ECC and virtual memory in system performance.
Details how the Memory Controller Unit and cache hierarchy manage the physical addressing, request scheduling, and high-speed translation between the CPU and the physical DRAM cells and I/O devices.
Explores the entire lifecycle of digital memory, from the nanoscale cell physics and 3D semiconductor fabrication of DRAM and NAND to the system-level architectural trade-offs necessary for high-performance and resilient storage devices.
Details how the Operating System employs Virtual Memory, hardware-enforced Paging with the TLB, and Protection Rings to create the illusion of isolated and limitless memory for processes.
Introduces the crucial interaction between the CPU’s processing components (like the registers and ALU) and the memory hierarchy (Cache and RAM).
This article provides a comprehensive overview of computer chipsets, explaining their evolution from multi-chip architectures to modern System-on-a-Chip (SoC) designs used in everything from desktop PCs to industrial edge devices.
A detailed analysis of the CPU’s Arithmetic Logic Unit (ALU), detailing its architecture, flag registers, and operation, including specific examples of binary arithmetic.
The Control Unit functions as the CPU’s orchestrator, detailing how it manages the Fetch-Decode-Execute cycle and uses timing signals to coordinate data flow between registers, memory, and the Arithmetic Logic Unit (ALU).
learn about hypervisors, paravirtualization, hardware support and virtualization technology on Linux, Windows, and macOS.
